FPIX2.1 test pcb

Document #:

EPP-doc-64-v1

Document type:

Drawing

Submitted by:

David Christian

Updated by:

David Christian

Document Created:

17 Feb 2006, 16:36

Contents Revised:

17 Feb 2006, 16:36

Metadata Revised:

19 May 2006, 16:44

Abstract:

Schematic & silk screen layer of test pcb for FPIX2.1 & single chip hybrid.
NOTE: In order to make the 1st hybrid stable at power up (& with default DAC values) we used refres=536kOhm instead of refres=698kOhm.

Files in Document:

• schematic (pdf) (Fpix2_5_JimH.pdf, 142.2 kB)
• silk screen layer (pdf) (FPIX2_5_JimH_SS.pdf, 260.8 kB)

Topics:

• Electronics:Front End
• R&D:Detectors

Authors:

• David Christian
• Jim Hoff

Referenced by:

• EPP-doc-65: FPIX2.1 wire bonding on test pcb